Decomposed Software Pipelining: A New Approach to Exploit Instruction Level Parallelism for Loop Programs

نویسندگان

  • Jiang Wang
  • Christine Eisenbeis
چکیده

This paper presents a new view on software pipelining, in which we consider software pipelining as an instruction level transformation from a vector of one-dimension to a matrix of two-dimensions. Thus, the software pipelining problem can be naturally decomposed into two subproblems, one is to determine the row-numbers of operations in the matrix and another is to determine the column-numbers. Using this viewpoint as a basis, we develop a new loop scheduling approach, called decomposed software pipelining.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Swing Modulo Scheduling

[19] B.R. Rau and C.D. Glaeser. Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing. [22] J. Wang and C. Eisenbeis. Decomposed software pipelining: A new approach to exploit instruction level parallelism for loops programs. In IFIP, January 1993.

متن کامل

A Software Pipelining Method Based on a Hierarchical Social Algorithm

Software pipelining is a compile-time scheduling technique that overlaps successive loop iterations to achieve instruction-level parallelism. It allows us to hide memory latency by overlapping the prefetches for a future iteration with the computation of the current iteration. This paper presents an efficient algorithm for determining the iteration bound of cyclic data flow graphs and the optim...

متن کامل

De-pipeline a software-pipelined loop

1 Dept. of Computer Science, The William Paterson University of New Jersey, Wayne, NJ 07470, USA 2 Wireless Speech and Data Processing, Nortel Networks, Montreal, QC, Canada, H3E 1H6 Abstract Software pipelining is a loop optimization technique that has been widely implemented in modern optimizing compilers. In order to fully utilize the instruction level parallelism of the recent VLIW DSP proc...

متن کامل

Assembly Code Conversion of Software-Pipelined Loop between two VLIW DSP Processors

In order to fully utilize the instruction level parallelism of VLIW DSP processors, DSP programs have to be optimized by software pipelining. Software pipelining has been studied for many years and widely implemented in optimizing compilers. However, due to the rearrangement of the original instructions, it is often very difficult to re-use or port the code of a software-pipelined loop to other...

متن کامل

Time Optimal Software Pipelining of Loops with Control Flows for VLIW Processors

Software pipelining is widely used as a compiler optimization technique to achieve high performance in machines that exploit instruction-level parallelism such as superscalar or VLIW processors. However, surprisingly, there have been few theoretical results on the optimality of software pipelined loops with control flows. The problem of time optimal software pipelining of loops with control flo...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 1993